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24-02-2010 #22Can't you use a spare o/p pin on the PIC instead of the 555?This is running off a remote 1.5V supply generated using a 555 and a -ve charge pump
I s C fast enough to read the clock pulses or are you using in-line assembler ? (ISTR the guy on cnczone couldn't get it to work in C)and a few tens of lines of C code later...
If you look at the PIC code I posted on the CNCzone site, you'll see the sequence I used (I don't have it to hand ATM).Bill/Robin, I know you guys have both done something along these lines already, how did you force the scales into fast read mode (currently I do this by hand) and, more importantly, how did you know when they got there and weren't in some 'hold' mode?
Essentially, I measure the data repeat rate from the scale to determine the current mode then apply pulses to change to the desired mode. The clk/data pulse sequence varies from scale to scale so I also test the data type to determine the type of scale.
Hold mode is a PITA because i can see no way to test the scale in in that Mode. In the end, I just used a reliable 'get back to normal' sequence then output the fast mode sequence blindly.
I have a one scale here that requires one extra pulse to get it to fast mode from hold, yet no way to determine the that this is a different type of scale from within the PIC. I will either have to program a special chip just for this scale or change the PIC code so it stores the sequence in EEPROM , that way I can change it from the PC program.
[edit]
Here you go:
Code:;Zero vernier display Zero movf rxbuff+1,w andlw 0xDF xorwf IDbyte,w ;test correct axis btfss status,z return call zeronorm btfss Mode,Fast ;if it was in fast mode then setfast return goto setFast ;set zero normal mode ZeroNorm call measure ;measure checks the clock to determine fast/slow mode btfss Mode,Fflg goto tstslow pdlp call PlsData ;pulse data until slow call measure btfsc Mode,Fflg ;test slow goto pdlp call PlsClk ;pulse clk (zero switch) return ;measure the vernier reading speed (300mS slow,20mS fast) measure bcf CMCON,CIS ;switch comp to clk input call synlp ;wait for clock low >1mS bcf Mode,Fflg ;if clock occurs within ~25mS then Fast flag will be set movlw 25 movwf vdata ;borrow vdata as counter m2lp btfsc CMCON,COUT bsf Mode,Fflg ; decfsz vdata+3,f goto m2lp decfsz vdata,f goto m2lp return Tstslow call PlsClk ;pulse clk call measure btfsc Mode,Fflg ;test slow goto pdlp ;if fast, pulse data until slow return ;normal zeroLast edited by BillTodd; 24-02-2010 at 10:33 PM.
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